xine-lib 1.2.13-20230125hg15249
mmx.h
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1/* mmx.h
2
3 MultiMedia eXtensions GCC interface library for IA32.
4
5 To use this library, simply include this header file
6 and compile with GCC. You MUST have inlining enabled
7 in order for mmx_ok() to work; this can be done by
8 simply using -O on the GCC command line.
9
10 Compiling with -DMMX_TRACE will cause detailed trace
11 output to be sent to stderr for each mmx operation.
12 This adds lots of code, and obviously slows execution to
13 a crawl, but can be very useful for debugging.
14
15 THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
16 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT
17 LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY
18 AND FITNESS FOR ANY PARTICULAR PURPOSE.
19
20 1997-99 by H. Dietz and R. Fisher
21
22 Notes:
23 It appears that the latest gas has the pand problem fixed, therefore
24 I'll undefine BROKEN_PAND by default.
25*/
26
27#ifndef _MMX_H
28#define _MMX_H
29
30# if defined(HAVE_CONFIG_H) && !defined(__XINE_LIB_CONFIG_H__)
31# error config.h not included in source file !
32# endif
33//#ifdef HAVE_CONFIG_H
34//# include "config.h"
35//#endif
36
37#include <xine/attributes.h>
38
39#include "goom_graphic.h"
40
41/* Warning: at this writing, the version of GAS packaged
42 with most Linux distributions does not handle the
43 parallel AND operation mnemonic correctly. If the
44 symbol BROKEN_PAND is defined, a slower alternative
45 coding will be used. If execution of mmxtest results
46 in an illegal instruction fault, define this symbol.
47*/
48#undef BROKEN_PAND
49
50
51/* The type of an value that fits in an MMX register
52 (note that long long constant values MUST be suffixed
53 by LL and unsigned long long values by ULL, lest
54 they be truncated by the compiler)
55*/
56typedef union {
57 long long q; /* Quadword (64-bit) value */
58 unsigned long long uq; /* Unsigned Quadword */
59 int d[2]; /* 2 Doubleword (32-bit) values */
60 unsigned int ud[2]; /* 2 Unsigned Doubleword */
61 short w[4]; /* 4 Word (16-bit) values */
62 unsigned short uw[4]; /* 4 Unsigned Word */
63 char b[8]; /* 8 Byte (8-bit) values */
64 unsigned char ub[8]; /* 8 Unsigned Byte */
65 float s[2]; /* Single-precision (32-bit) value */
66} ATTR_ALIGN(8) mmx_t; /* On an 8-byte (64-bit) boundary */
67
68
69
70/* Function to test if multimedia instructions are supported...
71*/
72static int
74{
75 /* Returns 1 if MMX instructions are supported,
76 3 if Cyrix MMX and Extended MMX instructions are supported
77 5 if AMD MMX and 3DNow! instructions are supported
78 13 if AMD Extended MMX, &3dNow supported
79 0 if hardware does not support any of these
80 */
81#if defined(ARCH_X86_X32) || defined(ARCH_X86_64)
82 return 13;
83#else
84 register int rval = 0;
85
86 __asm__ __volatile__ (
87 /* See if CPUID instruction is supported ... */
88 /* ... Get copies of EFLAGS into eax and ecx */
89 "pushl %%ebx\n\t"
90 "pushf\n\t"
91 "popl %%eax\n\t"
92 "movl %%eax, %%ecx\n\t"
93
94 /* ... Toggle the ID bit in one copy and store */
95 /* to the EFLAGS reg */
96 "xorl $0x200000, %%eax\n\t"
97 "push %%eax\n\t"
98 "popf\n\t"
99
100 /* ... Get the (hopefully modified) EFLAGS */
101 "pushf\n\t"
102 "popl %%eax\n\t"
103
104 /* ... Compare and test result */
105 "xorl %%eax, %%ecx\n\t"
106 "testl $0x200000, %%ecx\n\t"
107 "jz NotSupported1\n\t" /* CPUID not supported */
108
109
110 /* Get standard CPUID information, and
111 go to a specific vendor section */
112 "movl $0, %%eax\n\t"
113 "cpuid\n\t"
114
115 /* Check for Intel */
116 "cmpl $0x756e6547, %%ebx\n\t"
117 "jne TryAMD\n\t"
118 "cmpl $0x49656e69, %%edx\n\t"
119 "jne TryAMD\n\t"
120 "cmpl $0x6c65746e, %%ecx\n"
121 "jne TryAMD\n\t"
122 "jmp Intel\n\t"
123
124 /* Check for AMD */
125 "\nTryAMD:\n\t"
126 "cmpl $0x68747541, %%ebx\n\t"
127 "jne TryCyrix\n\t"
128 "cmpl $0x69746e65, %%edx\n\t"
129 "jne TryCyrix\n\t"
130 "cmpl $0x444d4163, %%ecx\n"
131 "jne TryCyrix\n\t"
132 "jmp AMD\n\t"
133
134 /* Check for Cyrix */
135 "\nTryCyrix:\n\t"
136 "cmpl $0x69727943, %%ebx\n\t"
137 "jne NotSupported2\n\t"
138 "cmpl $0x736e4978, %%edx\n\t"
139 "jne NotSupported3\n\t"
140 "cmpl $0x64616574, %%ecx\n\t"
141 "jne NotSupported4\n\t"
142 /* Drop through to Cyrix... */
143
144
145 /* Cyrix Section */
146 /* See if extended CPUID level 80000001 is supported */
147 /* The value of CPUID/80000001 for the 6x86MX is undefined
148 according to the Cyrix CPU Detection Guide (Preliminary
149 Rev. 1.01 table 1), so we'll check the value of eax for
150 CPUID/0 to see if standard CPUID level 2 is supported.
151 According to the table, the only CPU which supports level
152 2 is also the only one which supports extended CPUID levels.
153 */
154 "cmpl $0x2, %%eax\n\t"
155 "jne MMXtest\n\t" /* Use standard CPUID instead */
156
157 /* Extended CPUID supported (in theory), so get extended
158 features */
159 "movl $0x80000001, %%eax\n\t"
160 "cpuid\n\t"
161 "testl $0x00800000, %%eax\n\t" /* Test for MMX */
162 "jz NotSupported5\n\t" /* MMX not supported */
163 "testl $0x01000000, %%eax\n\t" /* Test for Ext'd MMX */
164 "jnz EMMXSupported\n\t"
165 "movl $1, %0\n\n\t" /* MMX Supported */
166 "jmp Return\n\n"
167 "EMMXSupported:\n\t"
168 "movl $3, %0\n\n\t" /* EMMX and MMX Supported */
169 "jmp Return\n\t"
170
171
172 /* AMD Section */
173 "AMD:\n\t"
174
175 /* See if extended CPUID is supported */
176 "movl $0x80000000, %%eax\n\t"
177 "cpuid\n\t"
178 "cmpl $0x80000000, %%eax\n\t"
179 "jl MMXtest\n\t" /* Use standard CPUID instead */
180
181 /* Extended CPUID supported, so get extended features */
182 "movl $0x80000001, %%eax\n\t"
183 "cpuid\n\t"
184 "testl $0x00800000, %%edx\n\t" /* Test for MMX */
185 "jz NotSupported6\n\t" /* MMX not supported */
186 "testl $0x80000000, %%edx\n\t" /* Test for 3DNow! */
187 "jnz ThreeDNowSupported\n\t"
188 "movl $1, %0\n\n\t" /* MMX Supported */
189 "jmp Return\n\n"
190 "ThreeDNowSupported:\n\t"
191 "testl $0x40000000, %%edx\n\t" /* Test AMD Extended MMX */
192 "jnz AMDXMMXSupported\n\t"
193 "movl $5, %0\n\n\t" /* 3DNow! and MMX Supported */
194 "jmp Return\n\t"
195 "AMDXMMXSupported:\n\t"
196 "movl $13, %0\n\n\t" /* XMMX, 3DNow! and MMX Supported */
197 "jmp Return\n\t"
198
199
200 /* Intel Section */
201 "Intel:\n\t"
202
203 /* Check for MMX */
204 "MMXtest:\n\t"
205 "movl $1, %%eax\n\t"
206 "cpuid\n\t"
207 "testl $0x00800000, %%edx\n\t" /* Test for MMX */
208 "jz NotSupported7\n\t" /* MMX Not supported */
209 "movl $1, %0\n\n\t" /* MMX Supported */
210 "jmp Return\n\t"
211
212 /* Nothing supported */
213 "\nNotSupported1:\n\t"
214 "#movl $101, %0\n\n\t"
215 "\nNotSupported2:\n\t"
216 "#movl $102, %0\n\n\t"
217 "\nNotSupported3:\n\t"
218 "#movl $103, %0\n\n\t"
219 "\nNotSupported4:\n\t"
220 "#movl $104, %0\n\n\t"
221 "\nNotSupported5:\n\t"
222 "#movl $105, %0\n\n\t"
223 "\nNotSupported6:\n\t"
224 "#movl $106, %0\n\n\t"
225 "\nNotSupported7:\n\t"
226 "#movl $107, %0\n\n\t"
227 "movl $0, %0\n\n\t"
228
229 "Return:\n\t"
230 "popl %%ebx\n\t"
231 : "=X" (rval)
232 : /* no input */
233 : "eax", "ecx", "edx"
234 );
235
236 /* Return */
237 return(rval);
238#endif
239}
240
241/* Function to test if mmx instructions are supported...
242*/
243static inline int
245{
246 /* Returns 1 if MMX instructions are supported, 0 otherwise */
247 return ( mm_support() & 0x1 );
248}
249
250int mmx_supported (void);
251int xmmx_supported (void);
252
253
254/* MMX optimized implementations */
255void draw_line_mmx (Pixel *data, int x1, int y1, int x2, int y2, int col, int screenx, int screeny);
256void draw_line_xmmx (Pixel *data, int x1, int y1, int x2, int y2, int col, int screenx, int screeny);
257void zoom_filter_mmx (int prevX, int prevY, Pixel *expix1, Pixel *expix2,
258 int *brutS, int *brutD, int buffratio, int precalCoef[16][16]);
259void zoom_filter_xmmx (int prevX, int prevY, Pixel *expix1, Pixel *expix2,
260 int *lbruS, int *lbruD, int buffratio, int precalCoef[16][16]);
261
262
263/* Helper functions for the instruction macros that follow...
264 (note that memory-to-register, m2r, instructions are nearly
265 as efficient as register-to-register, r2r, instructions;
266 however, memory-to-memory instructions are really simulated
267 as a convenience, and are only 1/3 as efficient)
268*/
269#ifdef MMX_TRACE
270
271/* Include the stuff for printing a trace to stderr...
272*/
273
274#include <stdio.h>
275
276#define mmx_i2r(op, imm, reg) \
277 { \
278 mmx_t mmx_trace; \
279 mmx_trace.uq = (imm); \
280 printf(#op "_i2r(" #imm "=0x%08x%08x, ", \
281 mmx_trace.d[1], mmx_trace.d[0]); \
282 __asm__ __volatile__ ("movq %%" #reg ", %0" \
283 : "=X" (mmx_trace) \
284 : /* nothing */ ); \
285 printf(#reg "=0x%08x%08x) => ", \
286 mmx_trace.d[1], mmx_trace.d[0]); \
287 __asm__ __volatile__ (#op " %0, %%" #reg \
288 : /* nothing */ \
289 : "X" (imm)); \
290 __asm__ __volatile__ ("movq %%" #reg ", %0" \
291 : "=X" (mmx_trace) \
292 : /* nothing */ ); \
293 printf(#reg "=0x%08x%08x\n", \
294 mmx_trace.d[1], mmx_trace.d[0]); \
295 }
296
297#define mmx_m2r(op, mem, reg) \
298 { \
299 mmx_t mmx_trace; \
300 mmx_trace = (mem); \
301 printf(#op "_m2r(" #mem "=0x%08x%08x, ", \
302 mmx_trace.d[1], mmx_trace.d[0]); \
303 __asm__ __volatile__ ("movq %%" #reg ", %0" \
304 : "=X" (mmx_trace) \
305 : /* nothing */ ); \
306 printf(#reg "=0x%08x%08x) => ", \
307 mmx_trace.d[1], mmx_trace.d[0]); \
308 __asm__ __volatile__ (#op " %0, %%" #reg \
309 : /* nothing */ \
310 : "m" (mem)); \
311 __asm__ __volatile__ ("movq %%" #reg ", %0" \
312 : "=X" (mmx_trace) \
313 : /* nothing */ ); \
314 printf(#reg "=0x%08x%08x\n", \
315 mmx_trace.d[1], mmx_trace.d[0]); \
316 }
317
318#define mmx_r2m(op, reg, mem) \
319 { \
320 mmx_t mmx_trace; \
321 __asm__ __volatile__ ("movq %%" #reg ", %0" \
322 : "=X" (mmx_trace) \
323 : /* nothing */ ); \
324 printf(#op "_r2m(" #reg "=0x%08x%08x, ", \
325 mmx_trace.d[1], mmx_trace.d[0]); \
326 mmx_trace = (mem); \
327 printf(#mem "=0x%08x%08x) => ", \
328 mmx_trace.d[1], mmx_trace.d[0]); \
329 __asm__ __volatile__ (#op " %%" #reg ", %0" \
330 : "=m" (mem) \
331 : /* nothing */ ); \
332 mmx_trace = (mem); \
333 printf(#mem "=0x%08x%08x\n", \
334 mmx_trace.d[1], mmx_trace.d[0]); \
335 }
336
337#define mmx_r2r(op, regs, regd) \
338 { \
339 mmx_t mmx_trace; \
340 __asm__ __volatile__ ("movq %%" #regs ", %0" \
341 : "=X" (mmx_trace) \
342 : /* nothing */ ); \
343 printf(#op "_r2r(" #regs "=0x%08x%08x, ", \
344 mmx_trace.d[1], mmx_trace.d[0]); \
345 __asm__ __volatile__ ("movq %%" #regd ", %0" \
346 : "=X" (mmx_trace) \
347 : /* nothing */ ); \
348 printf(#regd "=0x%08x%08x) => ", \
349 mmx_trace.d[1], mmx_trace.d[0]); \
350 __asm__ __volatile__ (#op " %" #regs ", %" #regd); \
351 __asm__ __volatile__ ("movq %%" #regd ", %0" \
352 : "=X" (mmx_trace) \
353 : /* nothing */ ); \
354 printf(#regd "=0x%08x%08x\n", \
355 mmx_trace.d[1], mmx_trace.d[0]); \
356 }
357
358#define mmx_m2m(op, mems, memd) \
359 { \
360 mmx_t mmx_trace; \
361 mmx_trace = (mems); \
362 printf(#op "_m2m(" #mems "=0x%08x%08x, ", \
363 mmx_trace.d[1], mmx_trace.d[0]); \
364 mmx_trace = (memd); \
365 printf(#memd "=0x%08x%08x) => ", \
366 mmx_trace.d[1], mmx_trace.d[0]); \
367 __asm__ __volatile__ ("movq %0, %%mm0\n\t" \
368 #op " %1, %%mm0\n\t" \
369 "movq %%mm0, %0" \
370 : "=m" (memd) \
371 : "m" (mems)); \
372 mmx_trace = (memd); \
373 printf(#memd "=0x%08x%08x\n", \
374 mmx_trace.d[1], mmx_trace.d[0]); \
375 }
376
377#else
378
379/* These macros are a lot simpler without the tracing...
380*/
381
382#define mmx_i2r(op, imm, reg) \
383 __asm__ __volatile__ (#op " %0, %%" #reg \
384 : /* nothing */ \
385 : "X" (imm) )
386
387#define mmx_m2r(op, mem, reg) \
388 __asm__ __volatile__ (#op " %0, %%" #reg \
389 : /* nothing */ \
390 : "m" (mem))
391
392#define mmx_r2m(op, reg, mem) \
393 __asm__ __volatile__ (#op " %%" #reg ", %0" \
394 : "=m" (mem) \
395 : /* nothing */ )
396
397#define mmx_r2r(op, regs, regd) \
398 __asm__ __volatile__ (#op " %" #regs ", %" #regd)
399
400#define mmx_m2m(op, mems, memd) \
401 __asm__ __volatile__ ("movq %0, %%mm0\n\t" \
402 #op " %1, %%mm0\n\t" \
403 "movq %%mm0, %0" \
404 : "=m" (memd) \
405 : "m" (mems))
406
407#endif
408
409
410/* 1x64 MOVe Quadword
411 (this is both a load and a store...
412 in fact, it is the only way to store)
413*/
414#define movq_m2r(var, reg) mmx_m2r(movq, var, reg)
415#define movq_r2m(reg, var) mmx_r2m(movq, reg, var)
416#define movq_r2r(regs, regd) mmx_r2r(movq, regs, regd)
417#define movq(vars, vard) \
418 __asm__ __volatile__ ("movq %1, %%mm0\n\t" \
419 "movq %%mm0, %0" \
420 : "=X" (vard) \
421 : "X" (vars))
422
423
424/* 1x32 MOVe Doubleword
425 (like movq, this is both load and store...
426 but is most useful for moving things between
427 mmx registers and ordinary registers)
428*/
429#define movd_m2r(var, reg) mmx_m2r(movd, var, reg)
430#define movd_r2m(reg, var) mmx_r2m(movd, reg, var)
431#define movd_r2r(regs, regd) mmx_r2r(movd, regs, regd)
432#define movd(vars, vard) \
433 __asm__ __volatile__ ("movd %1, %%mm0\n\t" \
434 "movd %%mm0, %0" \
435 : "=X" (vard) \
436 : "X" (vars))
437
438
439/* 2x32, 4x16, and 8x8 Parallel ADDs
440*/
441#define paddd_m2r(var, reg) mmx_m2r(paddd, var, reg)
442#define paddd_r2r(regs, regd) mmx_r2r(paddd, regs, regd)
443#define paddd(vars, vard) mmx_m2m(paddd, vars, vard)
444
445#define paddw_m2r(var, reg) mmx_m2r(paddw, var, reg)
446#define paddw_r2r(regs, regd) mmx_r2r(paddw, regs, regd)
447#define paddw(vars, vard) mmx_m2m(paddw, vars, vard)
448
449#define paddb_m2r(var, reg) mmx_m2r(paddb, var, reg)
450#define paddb_r2r(regs, regd) mmx_r2r(paddb, regs, regd)
451#define paddb(vars, vard) mmx_m2m(paddb, vars, vard)
452
453
454/* 4x16 and 8x8 Parallel ADDs using Saturation arithmetic
455*/
456#define paddsw_m2r(var, reg) mmx_m2r(paddsw, var, reg)
457#define paddsw_r2r(regs, regd) mmx_r2r(paddsw, regs, regd)
458#define paddsw(vars, vard) mmx_m2m(paddsw, vars, vard)
459
460#define paddsb_m2r(var, reg) mmx_m2r(paddsb, var, reg)
461#define paddsb_r2r(regs, regd) mmx_r2r(paddsb, regs, regd)
462#define paddsb(vars, vard) mmx_m2m(paddsb, vars, vard)
463
464
465/* 4x16 and 8x8 Parallel ADDs using Unsigned Saturation arithmetic
466*/
467#define paddusw_m2r(var, reg) mmx_m2r(paddusw, var, reg)
468#define paddusw_r2r(regs, regd) mmx_r2r(paddusw, regs, regd)
469#define paddusw(vars, vard) mmx_m2m(paddusw, vars, vard)
470
471#define paddusb_m2r(var, reg) mmx_m2r(paddusb, var, reg)
472#define paddusb_r2r(regs, regd) mmx_r2r(paddusb, regs, regd)
473#define paddusb(vars, vard) mmx_m2m(paddusb, vars, vard)
474
475
476/* 2x32, 4x16, and 8x8 Parallel SUBs
477*/
478#define psubd_m2r(var, reg) mmx_m2r(psubd, var, reg)
479#define psubd_r2r(regs, regd) mmx_r2r(psubd, regs, regd)
480#define psubd(vars, vard) mmx_m2m(psubd, vars, vard)
481
482#define psubw_m2r(var, reg) mmx_m2r(psubw, var, reg)
483#define psubw_r2r(regs, regd) mmx_r2r(psubw, regs, regd)
484#define psubw(vars, vard) mmx_m2m(psubw, vars, vard)
485
486#define psubb_m2r(var, reg) mmx_m2r(psubb, var, reg)
487#define psubb_r2r(regs, regd) mmx_r2r(psubb, regs, regd)
488#define psubb(vars, vard) mmx_m2m(psubb, vars, vard)
489
490
491/* 4x16 and 8x8 Parallel SUBs using Saturation arithmetic
492*/
493#define psubsw_m2r(var, reg) mmx_m2r(psubsw, var, reg)
494#define psubsw_r2r(regs, regd) mmx_r2r(psubsw, regs, regd)
495#define psubsw(vars, vard) mmx_m2m(psubsw, vars, vard)
496
497#define psubsb_m2r(var, reg) mmx_m2r(psubsb, var, reg)
498#define psubsb_r2r(regs, regd) mmx_r2r(psubsb, regs, regd)
499#define psubsb(vars, vard) mmx_m2m(psubsb, vars, vard)
500
501
502/* 4x16 and 8x8 Parallel SUBs using Unsigned Saturation arithmetic
503*/
504#define psubusw_m2r(var, reg) mmx_m2r(psubusw, var, reg)
505#define psubusw_r2r(regs, regd) mmx_r2r(psubusw, regs, regd)
506#define psubusw(vars, vard) mmx_m2m(psubusw, vars, vard)
507
508#define psubusb_m2r(var, reg) mmx_m2r(psubusb, var, reg)
509#define psubusb_r2r(regs, regd) mmx_r2r(psubusb, regs, regd)
510#define psubusb(vars, vard) mmx_m2m(psubusb, vars, vard)
511
512
513/* 4x16 Parallel MULs giving Low 4x16 portions of results
514*/
515#define pmullw_m2r(var, reg) mmx_m2r(pmullw, var, reg)
516#define pmullw_r2r(regs, regd) mmx_r2r(pmullw, regs, regd)
517#define pmullw(vars, vard) mmx_m2m(pmullw, vars, vard)
518
519
520/* 4x16 Parallel MULs giving High 4x16 portions of results
521*/
522#define pmulhw_m2r(var, reg) mmx_m2r(pmulhw, var, reg)
523#define pmulhw_r2r(regs, regd) mmx_r2r(pmulhw, regs, regd)
524#define pmulhw(vars, vard) mmx_m2m(pmulhw, vars, vard)
525
526
527/* 4x16->2x32 Parallel Mul-ADD
528 (muls like pmullw, then adds adjacent 16-bit fields
529 in the multiply result to make the final 2x32 result)
530*/
531#define pmaddwd_m2r(var, reg) mmx_m2r(pmaddwd, var, reg)
532#define pmaddwd_r2r(regs, regd) mmx_r2r(pmaddwd, regs, regd)
533#define pmaddwd(vars, vard) mmx_m2m(pmaddwd, vars, vard)
534
535
536/* 1x64 bitwise AND
537*/
538#ifdef BROKEN_PAND
539#define pand_m2r(var, reg) \
540 { \
541 mmx_m2r(pandn, (mmx_t) -1LL, reg); \
542 mmx_m2r(pandn, var, reg); \
543 }
544#define pand_r2r(regs, regd) \
545 { \
546 mmx_m2r(pandn, (mmx_t) -1LL, regd); \
547 mmx_r2r(pandn, regs, regd) \
548 }
549#define pand(vars, vard) \
550 { \
551 movq_m2r(vard, mm0); \
552 mmx_m2r(pandn, (mmx_t) -1LL, mm0); \
553 mmx_m2r(pandn, vars, mm0); \
554 movq_r2m(mm0, vard); \
555 }
556#else
557#define pand_m2r(var, reg) mmx_m2r(pand, var, reg)
558#define pand_r2r(regs, regd) mmx_r2r(pand, regs, regd)
559#define pand(vars, vard) mmx_m2m(pand, vars, vard)
560#endif
561
562
563/* 1x64 bitwise AND with Not the destination
564*/
565#define pandn_m2r(var, reg) mmx_m2r(pandn, var, reg)
566#define pandn_r2r(regs, regd) mmx_r2r(pandn, regs, regd)
567#define pandn(vars, vard) mmx_m2m(pandn, vars, vard)
568
569
570/* 1x64 bitwise OR
571*/
572#define por_m2r(var, reg) mmx_m2r(por, var, reg)
573#define por_r2r(regs, regd) mmx_r2r(por, regs, regd)
574#define por(vars, vard) mmx_m2m(por, vars, vard)
575
576
577/* 1x64 bitwise eXclusive OR
578*/
579#define pxor_m2r(var, reg) mmx_m2r(pxor, var, reg)
580#define pxor_r2r(regs, regd) mmx_r2r(pxor, regs, regd)
581#define pxor(vars, vard) mmx_m2m(pxor, vars, vard)
582
583
584/* 2x32, 4x16, and 8x8 Parallel CoMPare for EQuality
585 (resulting fields are either 0 or -1)
586*/
587#define pcmpeqd_m2r(var, reg) mmx_m2r(pcmpeqd, var, reg)
588#define pcmpeqd_r2r(regs, regd) mmx_r2r(pcmpeqd, regs, regd)
589#define pcmpeqd(vars, vard) mmx_m2m(pcmpeqd, vars, vard)
590
591#define pcmpeqw_m2r(var, reg) mmx_m2r(pcmpeqw, var, reg)
592#define pcmpeqw_r2r(regs, regd) mmx_r2r(pcmpeqw, regs, regd)
593#define pcmpeqw(vars, vard) mmx_m2m(pcmpeqw, vars, vard)
594
595#define pcmpeqb_m2r(var, reg) mmx_m2r(pcmpeqb, var, reg)
596#define pcmpeqb_r2r(regs, regd) mmx_r2r(pcmpeqb, regs, regd)
597#define pcmpeqb(vars, vard) mmx_m2m(pcmpeqb, vars, vard)
598
599
600/* 2x32, 4x16, and 8x8 Parallel CoMPare for Greater Than
601 (resulting fields are either 0 or -1)
602*/
603#define pcmpgtd_m2r(var, reg) mmx_m2r(pcmpgtd, var, reg)
604#define pcmpgtd_r2r(regs, regd) mmx_r2r(pcmpgtd, regs, regd)
605#define pcmpgtd(vars, vard) mmx_m2m(pcmpgtd, vars, vard)
606
607#define pcmpgtw_m2r(var, reg) mmx_m2r(pcmpgtw, var, reg)
608#define pcmpgtw_r2r(regs, regd) mmx_r2r(pcmpgtw, regs, regd)
609#define pcmpgtw(vars, vard) mmx_m2m(pcmpgtw, vars, vard)
610
611#define pcmpgtb_m2r(var, reg) mmx_m2r(pcmpgtb, var, reg)
612#define pcmpgtb_r2r(regs, regd) mmx_r2r(pcmpgtb, regs, regd)
613#define pcmpgtb(vars, vard) mmx_m2m(pcmpgtb, vars, vard)
614
615
616/* 1x64, 2x32, and 4x16 Parallel Shift Left Logical
617*/
618#define psllq_i2r(imm, reg) mmx_i2r(psllq, imm, reg)
619#define psllq_m2r(var, reg) mmx_m2r(psllq, var, reg)
620#define psllq_r2r(regs, regd) mmx_r2r(psllq, regs, regd)
621#define psllq(vars, vard) mmx_m2m(psllq, vars, vard)
622
623#define pslld_i2r(imm, reg) mmx_i2r(pslld, imm, reg)
624#define pslld_m2r(var, reg) mmx_m2r(pslld, var, reg)
625#define pslld_r2r(regs, regd) mmx_r2r(pslld, regs, regd)
626#define pslld(vars, vard) mmx_m2m(pslld, vars, vard)
627
628#define psllw_i2r(imm, reg) mmx_i2r(psllw, imm, reg)
629#define psllw_m2r(var, reg) mmx_m2r(psllw, var, reg)
630#define psllw_r2r(regs, regd) mmx_r2r(psllw, regs, regd)
631#define psllw(vars, vard) mmx_m2m(psllw, vars, vard)
632
633
634/* 1x64, 2x32, and 4x16 Parallel Shift Right Logical
635*/
636#define psrlq_i2r(imm, reg) mmx_i2r(psrlq, imm, reg)
637#define psrlq_m2r(var, reg) mmx_m2r(psrlq, var, reg)
638#define psrlq_r2r(regs, regd) mmx_r2r(psrlq, regs, regd)
639#define psrlq(vars, vard) mmx_m2m(psrlq, vars, vard)
640
641#define psrld_i2r(imm, reg) mmx_i2r(psrld, imm, reg)
642#define psrld_m2r(var, reg) mmx_m2r(psrld, var, reg)
643#define psrld_r2r(regs, regd) mmx_r2r(psrld, regs, regd)
644#define psrld(vars, vard) mmx_m2m(psrld, vars, vard)
645
646#define psrlw_i2r(imm, reg) mmx_i2r(psrlw, imm, reg)
647#define psrlw_m2r(var, reg) mmx_m2r(psrlw, var, reg)
648#define psrlw_r2r(regs, regd) mmx_r2r(psrlw, regs, regd)
649#define psrlw(vars, vard) mmx_m2m(psrlw, vars, vard)
650
651
652/* 2x32 and 4x16 Parallel Shift Right Arithmetic
653*/
654#define psrad_i2r(imm, reg) mmx_i2r(psrad, imm, reg)
655#define psrad_m2r(var, reg) mmx_m2r(psrad, var, reg)
656#define psrad_r2r(regs, regd) mmx_r2r(psrad, regs, regd)
657#define psrad(vars, vard) mmx_m2m(psrad, vars, vard)
658
659#define psraw_i2r(imm, reg) mmx_i2r(psraw, imm, reg)
660#define psraw_m2r(var, reg) mmx_m2r(psraw, var, reg)
661#define psraw_r2r(regs, regd) mmx_r2r(psraw, regs, regd)
662#define psraw(vars, vard) mmx_m2m(psraw, vars, vard)
663
664
665/* 2x32->4x16 and 4x16->8x8 PACK and Signed Saturate
666 (packs source and dest fields into dest in that order)
667*/
668#define packssdw_m2r(var, reg) mmx_m2r(packssdw, var, reg)
669#define packssdw_r2r(regs, regd) mmx_r2r(packssdw, regs, regd)
670#define packssdw(vars, vard) mmx_m2m(packssdw, vars, vard)
671
672#define packsswb_m2r(var, reg) mmx_m2r(packsswb, var, reg)
673#define packsswb_r2r(regs, regd) mmx_r2r(packsswb, regs, regd)
674#define packsswb(vars, vard) mmx_m2m(packsswb, vars, vard)
675
676
677/* 4x16->8x8 PACK and Unsigned Saturate
678 (packs source and dest fields into dest in that order)
679*/
680#define packuswb_m2r(var, reg) mmx_m2r(packuswb, var, reg)
681#define packuswb_r2r(regs, regd) mmx_r2r(packuswb, regs, regd)
682#define packuswb(vars, vard) mmx_m2m(packuswb, vars, vard)
683
684
685/* 2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK Low
686 (interleaves low half of dest with low half of source
687 as padding in each result field)
688*/
689#define punpckldq_m2r(var, reg) mmx_m2r(punpckldq, var, reg)
690#define punpckldq_r2r(regs, regd) mmx_r2r(punpckldq, regs, regd)
691#define punpckldq(vars, vard) mmx_m2m(punpckldq, vars, vard)
692
693#define punpcklwd_m2r(var, reg) mmx_m2r(punpcklwd, var, reg)
694#define punpcklwd_r2r(regs, regd) mmx_r2r(punpcklwd, regs, regd)
695#define punpcklwd(vars, vard) mmx_m2m(punpcklwd, vars, vard)
696
697#define punpcklbw_m2r(var, reg) mmx_m2r(punpcklbw, var, reg)
698#define punpcklbw_r2r(regs, regd) mmx_r2r(punpcklbw, regs, regd)
699#define punpcklbw(vars, vard) mmx_m2m(punpcklbw, vars, vard)
700
701
702/* 2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK High
703 (interleaves high half of dest with high half of source
704 as padding in each result field)
705*/
706#define punpckhdq_m2r(var, reg) mmx_m2r(punpckhdq, var, reg)
707#define punpckhdq_r2r(regs, regd) mmx_r2r(punpckhdq, regs, regd)
708#define punpckhdq(vars, vard) mmx_m2m(punpckhdq, vars, vard)
709
710#define punpckhwd_m2r(var, reg) mmx_m2r(punpckhwd, var, reg)
711#define punpckhwd_r2r(regs, regd) mmx_r2r(punpckhwd, regs, regd)
712#define punpckhwd(vars, vard) mmx_m2m(punpckhwd, vars, vard)
713
714#define punpckhbw_m2r(var, reg) mmx_m2r(punpckhbw, var, reg)
715#define punpckhbw_r2r(regs, regd) mmx_r2r(punpckhbw, regs, regd)
716#define punpckhbw(vars, vard) mmx_m2m(punpckhbw, vars, vard)
717
718
719/* Empty MMx State
720 (used to clean-up when going from mmx to float use
721 of the registers that are shared by both; note that
722 there is no float-to-mmx operation needed, because
723 only the float tag word info is corruptible)
724*/
725#ifdef MMX_TRACE
726
727#define emms() \
728 { \
729 printf("emms()\n"); \
730 __asm__ __volatile__ ("emms");
731 }
732
733#else
734
735#define emms() __asm__ __volatile__ ("emms")
736
737#endif
738
739#endif
740
#define ATTR_ALIGN(align)
Definition attributes.h:66
int mmx_supported(void)
void zoom_filter_mmx(int prevX, int prevY, Pixel *expix1, Pixel *expix2, int *brutS, int *brutD, int buffratio, int precalCoef[16][16])
static int mmx_ok(void)
Definition mmx.h:244
void zoom_filter_xmmx(int prevX, int prevY, Pixel *expix1, Pixel *expix2, int *lbruS, int *lbruD, int buffratio, int precalCoef[16][16])
void draw_line_xmmx(Pixel *data, int x1, int y1, int x2, int y2, int col, int screenx, int screeny)
static int mm_support(void)
Definition mmx.h:73
void draw_line_mmx(Pixel *data, int x1, int y1, int x2, int y2, int col, int screenx, int screeny)
int xmmx_supported(void)
Definition goom_graphic.h:55
Definition mmx.h:56
long long q
Definition mmx.h:57
unsigned long long uq
Definition mmx.h:58